Principales conférences et principaux articles en management de projet
2009-2013ARTS et METIERS PARIS (ENSAM) "Mastère Spécialisé Management des Contrats Globaux. Module "Management de Projets Complexes".
2010PMI chapitre Paris île-de-France "La pratique du PMO dans les entreprises". Conférence sur "La création et l'évolution d'un PMO central (le Project Office) chez ALSTOM Transport".
2003-2008HEC PARIS, "Mastère Management de Grands Projets", "Mastère Management Industriel International", "Institut Dassault : Dassault aviation coordination"...
2006 "AFITEP (Association francophone de Management de Projet) 7ème journée de Conduite Economique des Projets "Project Management Office et performance de l'entreprise: Rôle du PMO dans la diffusion de la culture projet"
2004-2006ALSTOM Transport "Project Management Conference Days: Project Management road shows" à Paris, Amsterdam, Bruxelles, Barcelone, Sao Paulo, Singapour et New York
2004-2006ALSTOM Transport "Project Management Manual"..."
2005ALSTOM Transport: "Les fondamentaux du Management de Projet"" (Support de formation, traduction en 7 langues)
2003PSA PEUGEOT CITROËN Assemblée CCEE "L'introduction de l'informatique embarquée dans les trains."
Principales citations en management de projet
2006 Par Jean-Paul Bernoville "Thèse: Project Office Logique de développement" (LDEV) Chapitre 3: Examen des pratiques réelles
1989 "Plane transformation algorithms and data structure access based on a new algebraic memory model" (Published in International Symposium on Optimal Algorithms)
1989 "Memory and Algebra" (Published in MFCS'89 14th International Symposium on Mathematical Foundations of Computer Science)
1981 "Système adaptatif de vérification du locuteur" (Publié dans la Bulletin de l'Institut de Phonétique de Grenoble St-Martin-d'Hères 1981, vol. 10-11)
Principales citations en informatique fondamentale
2013 By W.A.C. Weerakoon , A.S. Karunananda , N.G.J. Dias, in "A tactics memory for a new theory of computing" 8th International Conference on Computer Science & Education (ICCSE) 2013.
2009 By Arun Kejariwal , Alexandru Nicolau , Utpal Banerjee , Alexander V. Veidenbaum , Constantine D. Polychronopoulos, in "Cache-aware partitioning of multi-dimensional iteration spaces." Proceedings of SYSTOR 2009: The Israeli Experimental Systems Conference. ACM International Conference Proceeding Series 2009.
Procédé et unité de gestion de mots d'adresse (French Patent 88 04809 publication 1988)
Arrangement bi-dimensionnel de points mémoire et structure de réseaux de neurones utilisant un tel arrangement. (French Patent 88 14999 publication 1988)
Data access in a processor (United States Patent 7107429 publication 1991)
A data processor comprising: a register memory comprising an array of memory cells, each cell being addressable by means of an instruction specifying a pair of coordinates that identify the cell in the array.
Method and device for the processing of address words (European Patent EP0337544. United States Patent 5134694 publication 1992)
Process for the management of address words which determines destination addresses for the switching of data on the basis of input address words of (M+N) bits. The process includes the following steps: on the basis of two input address words, separation of each one of these words into two fields of M and N bits respectively combination of these fields in accordance with a law of composition of non-commutative groups in order to deliver destination addresses emanating from the combination. The composition laws which are implemented necessitate only simple operations. Also a unit for the management of address words. This permits reduction of the addressing periods in searching for data, for example when they are stored in memory.
An arrangement of data cells which stores at least one matrix of data words which are arranged in rows and columns, the matrix being distributed in the arrangement in order to deliver/receive, via a single bus, permuted data words which correspond either to a row or to a column of the matrix. Each data cell is connected to the single bus via series-connected switches which are associated with a respective addressing mode, the switches which address a same word of a same mode being directly controlled by a same selection signal. Circulation members enable the original order of the data on the bus to be restored. An arrangement of this kind is used in a layered neural network system for executing the error backpropagation algorithm.
